1. Field of the Invention
The invention relates to a configuration of a capacitor of a semiconductor device such as a dynamic random access memory (DRAM) and a method of fabricating the same.
2. Related Art
There is proposed a capacitor having a cylindrical storage node for increasing electric charge storage capacity (amount of electric charge to be stored therein, hereinafter simply referred to as charge storage capacity) as a capacitor of a semiconductor device such as a DRAM as disclosed in JP-A 2-226761, 3-232271, 6-177350 and 8-330539.
It is an object of the invention to provide a semiconductor device provided with a capacitor having a large charge storage capacity with high reliability.
It is another object of the invention to provide a method of fabricating a semiconductor device capable of restricting the increase in the number of fabricating steps.
To achieve above object of the invention, a semiconductor device of the first aspect of the invention comprises first and second transistors formed on a semiconductor substrate, a first capacitor composed of a first storage node connected to the first transistor, a capacitor insulating film and a self-plate, and a second capacitor composed of a second storage node connected to the second transistor, the capacitor insulating film and the self-plate, wherein the first storage node surrounds the periphery of the second storage node.
To achieve the another object of the invention, a method of fabricating a semiconductor device of the second aspect of the invention comprises a step of forming first and second transistors on a semiconductor substrate, a step of forming an insulating film on the first and second transistors, a step of defining a first opening in the insulating film formed on a source or a drain of the first transistor, a step of defining a second opening in the insulating film formed on a source or a drain of the second transistor, a step of embedding a conductive material in the first and second openings, a step of forming a mask pattern on the insulating film so as to cover the second opening, a step of forming a conductive film on inner and outer side walls of a first sacrificial film so that the conductive film is connected to the conductive material embedded in the first opening at an outer side wall of the mask pattern and connected to the conductive material embedded in the second opening inside the first sacrificial film, a step of forming first and second storage nodes by removing the mask pattern, a step of forming a capacitor insulating film on the insulating film so as to cover the first and second storage nodes, and a step of forming a self-plate on the capacitor insulating film.